目录
- 服务器分层拓扑架构图形化显示工具 --- HWLOC
- 下载
- 依赖包安装
- 源码编译安装
- 执行命令示例
- 显示 PCI 层次结构
- 参考文档
- 下载
服务器分层拓扑架构图形化显示工具 --- HWLOC
可移植硬件局部 （hwloc） 软件包提供了现代架构分层拓扑的可移植抽象（跨操作系统、版本、体系结构等），包括 NUMA 内存节点（DRAM、HBM、非易失性内存、CXL 等）、处理器包、共享缓存、内核和同步多线程。它还收集各种系统属性，如缓存和内存信息，以及 I/O 设备的位置，如网络接口、InfiniBand HCA 或 GPU;hwloc 可以以人类可读的格式显示拓扑，既可以是图形模式 （X11），也可以是以几种不同格式之一导出，包括：纯文本、LaTeX tikzpicture、PDF、PNG 和 FIG（请参阅下面的命令行示例）。请注意，某些导出格式需要其他支持库 HWLOC 提供了一个用于操作拓扑和对象的编程接口。它还带来了一个强大的 CPU 位图 API，用于描述物理/逻辑处理器上的拓扑对象位置该工具所呈现的分层拓扑结构相较于 lscpu, numactl 更加直观, 而且还支持图形化输出;
下载
Github --- hwloc
hwloc 官网下载地址
yum install hwloc # openEular, redhat
sudo apt install hwloc # debian, ubuntu
依赖包安装
yum install make automake autoconf Libtool gcc
源码编译安装
shell$ git clone https://github.com/open-mpi/hwloc.git
shell$ cd hwloc
shell$ ./autogen.sh
shell$ ./configure --prefix=...
shell$ make
shell$ make install
官网安装指导
执行命令示例
# 显示 CPU 拓步图
lstopo
lstopo-no-graphics
#
hwloc-info
# 进程绑定
hwloc-ps
# 可执行文件绑核
hwloc-bind
显示 PCI 层次结构
[root@localhost home]# hwloc-ls
Machine (1511GB total)Package L#0NUMANode L#0 (P#0 755GB)L3 L#0 (320MB)L2 L#0 (2048KB) + L1d L#0 (48KB) + L1i L#0 (32KB) + Core L#0PU L#0 (P#0)PU L#1 (P#128)L2 L#1 (2048KB) + L1d L#1 (48KB) + L1i L#1 (32KB) + Core L#1PU L#2 (P#1)PU L#3 (P#129)L2 L#2 (2048KB) + L1d L#2 (48KB) + L1i L#2 (32KB) + Core L#2PU L#4 (P#2)PU L#5 (P#130)L2 L#3 (2048KB) + L1d L#3 (48KB) + L1i L#3 (32KB) + Core L#3PU L#6 (P#3)PU L#7 (P#131)L2 L#4 (2048KB) + L1d L#4 (48KB) + L1i L#4 (32KB) + Core L#4PU L#8 (P#4)PU L#9 (P#132)L2 L#5 (2048KB) + L1d L#5 (48KB) + L1i L#5 (32KB) + Core L#5PU L#10 (P#5)PU L#11 (P#133)L2 L#6 (2048KB) + L1d L#6 (48KB) + L1i L#6 (32KB) + Core L#6PU L#12 (P#6)PU L#13 (P#134)L2 L#7 (2048KB) + L1d L#7 (48KB) + L1i L#7 (32KB) + Core L#7PU L#14 (P#7)PU L#15 (P#135)L2 L#8 (2048KB) + L1d L#8 (48KB) + L1i L#8 (32KB) + Core L#8PU L#16 (P#8)PU L#17 (P#136)L2 L#9 (2048KB) + L1d L#9 (48KB) + L1i L#9 (32KB) + Core L#9PU L#18 (P#9)PU L#19 (P#137)L2 L#10 (2048KB) + L1d L#10 (48KB) + L1i L#10 (32KB) + Core L#10PU L#20 (P#10)PU L#21 (P#138)L2 L#11 (2048KB) + L1d L#11 (48KB) + L1i L#11 (32KB) + Core L#11PU L#22 (P#11)PU L#23 (P#139)L2 L#12 (2048KB) + L1d L#12 (48KB) + L1i L#12 (32KB) + Core L#12PU L#24 (P#12)PU L#25 (P#140)L2 L#13 (2048KB) + L1d L#13 (48KB) + L1i L#13 (32KB) + Core L#13PU L#26 (P#13)PU L#27 (P#141)L2 L#14 (2048KB) + L1d L#14 (48KB) + L1i L#14 (32KB) + Core L#14PU L#28 (P#14)PU L#29 (P#142)L2 L#15 (2048KB) + L1d L#15 (48KB) + L1i L#15 (32KB) + Core L#15PU L#30 (P#15)PU L#31 (P#143)L2 L#16 (2048KB) + L1d L#16 (48KB) + L1i L#16 (32KB) + Core L#16PU L#32 (P#16)PU L#33 (P#144)L2 L#17 (2048KB) + L1d L#17 (48KB) + L1i L#17 (32KB) + Core L#17PU L#34 (P#17)PU L#35 (P#145)L2 L#18 (2048KB) + L1d L#18 (48KB) + L1i L#18 (32KB) + Core L#18PU L#36 (P#18)PU L#37 (P#146)L2 L#19 (2048KB) + L1d L#19 (48KB) + L1i L#19 (32KB) + Core L#19PU L#38 (P#19)PU L#39 (P#147)L2 L#20 (2048KB) + L1d L#20 (48KB) + L1i L#20 (32KB) + Core L#20PU L#40 (P#20)PU L#41 (P#148)L2 L#21 (2048KB) + L1d L#21 (48KB) + L1i L#21 (32KB) + Core L#21PU L#42 (P#21)PU L#43 (P#149)L2 L#22 (2048KB) + L1d L#22 (48KB) + L1i L#22 (32KB) + Core L#22PU L#44 (P#22)PU L#45 (P#150)L2 L#23 (2048KB) + L1d L#23 (48KB) + L1i L#23 (32KB) + Core L#23PU L#46 (P#23)PU L#47 (P#151)L2 L#24 (2048KB) + L1d L#24 (48KB) + L1i L#24 (32KB) + Core L#24PU L#48 (P#24)PU L#49 (P#152)L2 L#25 (2048KB) + L1d L#25 (48KB) + L1i L#25 (32KB) + Core L#25PU L#50 (P#25)PU L#51 (P#153)L2 L#26 (2048KB) + L1d L#26 (48KB) + L1i L#26 (32KB) + Core L#26PU L#52 (P#26)PU L#53 (P#154)L2 L#27 (2048KB) + L1d L#27 (48KB) + L1i L#27 (32KB) + Core L#27PU L#54 (P#27)PU L#55 (P#155)L2 L#28 (2048KB) + L1d L#28 (48KB) + L1i L#28 (32KB) + Core L#28PU L#56 (P#28)PU L#57 (P#156)L2 L#29 (2048KB) + L1d L#29 (48KB) + L1i L#29 (32KB) + Core L#29PU L#58 (P#29)PU L#59 (P#157)L2 L#30 (2048KB) + L1d L#30 (48KB) + L1i L#30 (32KB) + Core L#30PU L#60 (P#30)PU L#61 (P#158)L2 L#31 (2048KB) + L1d L#31 (48KB) + L1i L#31 (32KB) + Core L#31PU L#62 (P#31)PU L#63 (P#159)L2 L#32 (2048KB) + L1d L#32 (48KB) + L1i L#32 (32KB) + Core L#32PU L#64 (P#32)PU L#65 (P#160)L2 L#33 (2048KB) + L1d L#33 (48KB) + L1i L#33 (32KB) + Core L#33PU L#66 (P#33)PU L#67 (P#161)L2 L#34 (2048KB) + L1d L#34 (48KB) + L1i L#34 (32KB) + Core L#34PU L#68 (P#34)PU L#69 (P#162)L2 L#35 (2048KB) + L1d L#35 (48KB) + L1i L#35 (32KB) + Core L#35PU L#70 (P#35)PU L#71 (P#163)L2 L#36 (2048KB) + L1d L#36 (48KB) + L1i L#36 (32KB) + Core L#36PU L#72 (P#36)PU L#73 (P#164)L2 L#37 (2048KB) + L1d L#37 (48KB) + L1i L#37 (32KB) + Core L#37PU L#74 (P#37)PU L#75 (P#165)L2 L#38 (2048KB) + L1d L#38 (48KB) + L1i L#38 (32KB) + Core L#38PU L#76 (P#38)PU L#77 (P#166)L2 L#39 (2048KB) + L1d L#39 (48KB) + L1i L#39 (32KB) + Core L#39PU L#78 (P#39)PU L#79 (P#167)L2 L#40 (2048KB) + L1d L#40 (48KB) + L1i L#40 (32KB) + Core L#40PU L#80 (P#40)PU L#81 (P#168)L2 L#41 (2048KB) + L1d L#41 (48KB) + L1i L#41 (32KB) + Core L#41PU L#82 (P#41)PU L#83 (P#169)L2 L#42 (2048KB) + L1d L#42 (48KB) + L1i L#42 (32KB) + Core L#42PU L#84 (P#42)PU L#85 (P#170)L2 L#43 (2048KB) + L1d L#43 (48KB) + L1i L#43 (32KB) + Core L#43PU L#86 (P#43)PU L#87 (P#171)L2 L#44 (2048KB) + L1d L#44 (48KB) + L1i L#44 (32KB) + Core L#44PU L#88 (P#44)PU L#89 (P#172)L2 L#45 (2048KB) + L1d L#45 (48KB) + L1i L#45 (32KB) + Core L#45PU L#90 (P#45)PU L#91 (P#173)L2 L#46 (2048KB) + L1d L#46 (48KB) + L1i L#46 (32KB) + Core L#46PU L#92 (P#46)PU L#93 (P#174)L2 L#47 (2048KB) + L1d L#47 (48KB) + L1i L#47 (32KB) + Core L#47PU L#94 (P#47)PU L#95 (P#175)L2 L#48 (2048KB) + L1d L#48 (48KB) + L1i L#48 (32KB) + Core L#48PU L#96 (P#48)PU L#97 (P#176)L2 L#49 (2048KB) + L1d L#49 (48KB) + L1i L#49 (32KB) + Core L#49PU L#98 (P#49)PU L#99 (P#177)L2 L#50 (2048KB) + L1d L#50 (48KB) + L1i L#50 (32KB) + Core L#50PU L#100 (P#50)PU L#101 (P#178)L2 L#51 (2048KB) + L1d L#51 (48KB) + L1i L#51 (32KB) + Core L#51PU L#102 (P#51)PU L#103 (P#179)L2 L#52 (2048KB) + L1d L#52 (48KB) + L1i L#52 (32KB) + Core L#52PU L#104 (P#52)PU L#105 (P#180)L2 L#53 (2048KB) + L1d L#53 (48KB) + L1i L#53 (32KB) + Core L#53PU L#106 (P#53)PU L#107 (P#181)L2 L#54 (2048KB) + L1d L#54 (48KB) + L1i L#54 (32KB) + Core L#54PU L#108 (P#54)PU L#109 (P#182)L2 L#55 (2048KB) + L1d L#55 (48KB) + L1i L#55 (32KB) + Core L#55PU L#110 (P#55)PU L#111 (P#183)L2 L#56 (2048KB) + L1d L#56 (48KB) + L1i L#56 (32KB) + Core L#56PU L#112 (P#56)PU L#113 (P#184)L2 L#57 (2048KB) + L1d L#57 (48KB) + L1i L#57 (32KB) + Core L#57PU L#114 (P#57)PU L#115 (P#185)L2 L#58 (2048KB) + L1d L#58 (48KB) + L1i L#58 (32KB) + Core L#58PU L#116 (P#58)PU L#117 (P#186)L2 L#59 (2048KB) + L1d L#59 (48KB) + L1i L#59 (32KB) + Core L#59PU L#118 (P#59)PU L#119 (P#187)L2 L#60 (2048KB) + L1d L#60 (48KB) + L1i L#60 (32KB) + Core L#60PU L#120 (P#60)PU L#121 (P#188)L2 L#61 (2048KB) + L1d L#61 (48KB) + L1i L#61 (32KB) + Core L#61PU L#122 (P#61)PU L#123 (P#189)L2 L#62 (2048KB) + L1d L#62 (48KB) + L1i L#62 (32KB) + Core L#62PU L#124 (P#62)PU L#125 (P#190)L2 L#63 (2048KB) + L1d L#63 (48KB) + L1i L#63 (32KB) + Core L#63PU L#126 (P#63)PU L#127 (P#191)HostBridgePCIBridgePCIBridgePCI 02:00.0 (VGA)PCI 00:17.0 (SATA)PCI 00:18.0 (SATA)PCI 00:19.0 (SATA)HostBridgePCIBridgePCI 16:00.0 (Ethernet)Net "ens16f0"PCI 16:00.1 (Ethernet)Net "ens16f1"PCI 16:00.2 (Ethernet)Net "ens16f2"PCI 16:00.3 (Ethernet)Net "ens16f3"HostBridgePCIBridgePCI 38:00.0 (NVMExp)Block(Disk) "nvme23n1"PCIBridgePCI 39:00.0 (NVMExp)Block(Disk) "nvme19n1"PCIBridgePCI 3a:00.0 (NVMExp)Block(Disk) "nvme16n1"PCIBridgePCI 3b:00.0 (NVMExp)Block(Disk) "nvme9n1"HostBridgePCIBridgePCI 49:00.0 (NVMExp)Block(Disk) "nvme21n1"PCIBridgePCI 4a:00.0 (NVMExp)Block(Disk) "nvme6n1"HostBridgePCIBridgePCI 5a:00.0 (NVMExp)Block(Disk) "nvme17n1"PCIBridgePCI 5b:00.0 (NVMExp)Block(Disk) "nvme4n1"PCIBridgePCI 5c:00.0 (NVMExp)Block(Disk) "nvme5n1"PCIBridgePCI 5d:00.0 (NVMExp)Block(Disk) "nvme11n1"HostBridgePCI 70:00.0 (Co-Processor)HostBridgePCI 72:00.0 (Co-Processor)Package L#1NUMANode L#1 (P#1 756GB)L3 L#1 (320MB)L2 L#64 (2048KB) + L1d L#64 (48KB) + L1i L#64 (32KB) + Core L#64PU L#128 (P#64)PU L#129 (P#192)L2 L#65 (2048KB) + L1d L#65 (48KB) + L1i L#65 (32KB) + Core L#65PU L#130 (P#65)PU L#131 (P#193)L2 L#66 (2048KB) + L1d L#66 (48KB) + L1i L#66 (32KB) + Core L#66PU L#132 (P#66)PU L#133 (P#194)L2 L#67 (2048KB) + L1d L#67 (48KB) + L1i L#67 (32KB) + Core L#67PU L#134 (P#67)PU L#135 (P#195)L2 L#68 (2048KB) + L1d L#68 (48KB) + L1i L#68 (32KB) + Core L#68PU L#136 (P#68)PU L#137 (P#196)L2 L#69 (2048KB) + L1d L#69 (48KB) + L1i L#69 (32KB) + Core L#69PU L#138 (P#69)PU L#139 (P#197)L2 L#70 (2048KB) + L1d L#70 (48KB) + L1i L#70 (32KB) + Core L#70PU L#140 (P#70)PU L#141 (P#198)L2 L#71 (2048KB) + L1d L#71 (48KB) + L1i L#71 (32KB) + Core L#71PU L#142 (P#71)PU L#143 (P#199)L2 L#72 (2048KB) + L1d L#72 (48KB) + L1i L#72 (32KB) + Core L#72PU L#144 (P#72)PU L#145 (P#200)L2 L#73 (2048KB) + L1d L#73 (48KB) + L1i L#73 (32KB) + Core L#73PU L#146 (P#73)PU L#147 (P#201)L2 L#74 (2048KB) + L1d L#74 (48KB) + L1i L#74 (32KB) + Core L#74PU L#148 (P#74)PU L#149 (P#202)L2 L#75 (2048KB) + L1d L#75 (48KB) + L1i L#75 (32KB) + Core L#75PU L#150 (P#75)PU L#151 (P#203)L2 L#76 (2048KB) + L1d L#76 (48KB) + L1i L#76 (32KB) + Core L#76PU L#152 (P#76)PU L#153 (P#204)L2 L#77 (2048KB) + L1d L#77 (48KB) + L1i L#77 (32KB) + Core L#77PU L#154 (P#77)PU L#155 (P#205)L2 L#78 (2048KB) + L1d L#78 (48KB) + L1i L#78 (32KB) + Core L#78PU L#156 (P#78)PU L#157 (P#206)L2 L#79 (2048KB) + L1d L#79 (48KB) + L1i L#79 (32KB) + Core L#79PU L#158 (P#79)PU L#159 (P#207)L2 L#80 (2048KB) + L1d L#80 (48KB) + L1i L#80 (32KB) + Core L#80PU L#160 (P#80)PU L#161 (P#208)L2 L#81 (2048KB) + L1d L#81 (48KB) + L1i L#81 (32KB) + Core L#81PU L#162 (P#81)PU L#163 (P#209)L2 L#82 (2048KB) + L1d L#82 (48KB) + L1i L#82 (32KB) + Core L#82PU L#164 (P#82)PU L#165 (P#210)L2 L#83 (2048KB) + L1d L#83 (48KB) + L1i L#83 (32KB) + Core L#83PU L#166 (P#83)PU L#167 (P#211)L2 L#84 (2048KB) + L1d L#84 (48KB) + L1i L#84 (32KB) + Core L#84PU L#168 (P#84)PU L#169 (P#212)L2 L#85 (2048KB) + L1d L#85 (48KB) + L1i L#85 (32KB) + Core L#85PU L#170 (P#85)PU L#171 (P#213)L2 L#86 (2048KB) + L1d L#86 (48KB) + L1i L#86 (32KB) + Core L#86PU L#172 (P#86)PU L#173 (P#214)L2 L#87 (2048KB) + L1d L#87 (48KB) + L1i L#87 (32KB) + Core L#87PU L#174 (P#87)PU L#175 (P#215)L2 L#88 (2048KB) + L1d L#88 (48KB) + L1i L#88 (32KB) + Core L#88PU L#176 (P#88)PU L#177 (P#216)L2 L#89 (2048KB) + L1d L#89 (48KB) + L1i L#89 (32KB) + Core L#89PU L#178 (P#89)PU L#179 (P#217)L2 L#90 (2048KB) + L1d L#90 (48KB) + L1i L#90 (32KB) + Core L#90PU L#180 (P#90)PU L#181 (P#218)L2 L#91 (2048KB) + L1d L#91 (48KB) + L1i L#91 (32KB) + Core L#91PU L#182 (P#91)PU L#183 (P#219)L2 L#92 (2048KB) + L1d L#92 (48KB) + L1i L#92 (32KB) + Core L#92PU L#184 (P#92)PU L#185 (P#220)L2 L#93 (2048KB) + L1d L#93 (48KB) + L1i L#93 (32KB) + Core L#93PU L#186 (P#93)PU L#187 (P#221)L2 L#94 (2048KB) + L1d L#94 (48KB) + L1i L#94 (32KB) + Core L#94PU L#188 (P#94)PU L#189 (P#222)L2 L#95 (2048KB) + L1d L#95 (48KB) + L1i L#95 (32KB) + Core L#95PU L#190 (P#95)PU L#191 (P#223)L2 L#96 (2048KB) + L1d L#96 (48KB) + L1i L#96 (32KB) + Core L#96PU L#192 (P#96)PU L#193 (P#224)L2 L#97 (2048KB) + L1d L#97 (48KB) + L1i L#97 (32KB) + Core L#97PU L#194 (P#97)PU L#195 (P#225)L2 L#98 (2048KB) + L1d L#98 (48KB) + L1i L#98 (32KB) + Core L#98PU L#196 (P#98)PU L#197 (P#226)L2 L#99 (2048KB) + L1d L#99 (48KB) + L1i L#99 (32KB) + Core L#99PU L#198 (P#99)PU L#199 (P#227)L2 L#100 (2048KB) + L1d L#100 (48KB) + L1i L#100 (32KB) + Core L#100PU L#200 (P#100)PU L#201 (P#228)L2 L#101 (2048KB) + L1d L#101 (48KB) + L1i L#101 (32KB) + Core L#101PU L#202 (P#101)PU L#203 (P#229)L2 L#102 (2048KB) + L1d L#102 (48KB) + L1i L#102 (32KB) + Core L#102PU L#204 (P#102)PU L#205 (P#230)L2 L#103 (2048KB) + L1d L#103 (48KB) + L1i L#103 (32KB) + Core L#103PU L#206 (P#103)PU L#207 (P#231)L2 L#104 (2048KB) + L1d L#104 (48KB) + L1i L#104 (32KB) + Core L#104PU L#208 (P#104)PU L#209 (P#232)L2 L#105 (2048KB) + L1d L#105 (48KB) + L1i L#105 (32KB) + Core L#105PU L#210 (P#105)PU L#211 (P#233)L2 L#106 (2048KB) + L1d L#106 (48KB) + L1i L#106 (32KB) + Core L#106PU L#212 (P#106)PU L#213 (P#234)L2 L#107 (2048KB) + L1d L#107 (48KB) + L1i L#107 (32KB) + Core L#107PU L#214 (P#107)PU L#215 (P#235)L2 L#108 (2048KB) + L1d L#108 (48KB) + L1i L#108 (32KB) + Core L#108PU L#216 (P#108)PU L#217 (P#236)L2 L#109 (2048KB) + L1d L#109 (48KB) + L1i L#109 (32KB) + Core L#109PU L#218 (P#109)PU L#219 (P#237)L2 L#110 (2048KB) + L1d L#110 (48KB) + L1i L#110 (32KB) + Core L#110PU L#220 (P#110)PU L#221 (P#238)L2 L#111 (2048KB) + L1d L#111 (48KB) + L1i L#111 (32KB) + Core L#111PU L#222 (P#111)PU L#223 (P#239)L2 L#112 (2048KB) + L1d L#112 (48KB) + L1i L#112 (32KB) + Core L#112PU L#224 (P#112)PU L#225 (P#240)L2 L#113 (2048KB) + L1d L#113 (48KB) + L1i L#113 (32KB) + Core L#113PU L#226 (P#113)PU L#227 (P#241)L2 L#114 (2048KB) + L1d L#114 (48KB) + L1i L#114 (32KB) + Core L#114PU L#228 (P#114)PU L#229 (P#242)L2 L#115 (2048KB) + L1d L#115 (48KB) + L1i L#115 (32KB) + Core L#115PU L#230 (P#115)PU L#231 (P#243)L2 L#116 (2048KB) + L1d L#116 (48KB) + L1i L#116 (32KB) + Core L#116PU L#232 (P#116)PU L#233 (P#244)L2 L#117 (2048KB) + L1d L#117 (48KB) + L1i L#117 (32KB) + Core L#117PU L#234 (P#117)PU L#235 (P#245)L2 L#118 (2048KB) + L1d L#118 (48KB) + L1i L#118 (32KB) + Core L#118PU L#236 (P#118)PU L#237 (P#246)L2 L#119 (2048KB) + L1d L#119 (48KB) + L1i L#119 (32KB) + Core L#119PU L#238 (P#119)PU L#239 (P#247)L2 L#120 (2048KB) + L1d L#120 (48KB) + L1i L#120 (32KB) + Core L#120PU L#240 (P#120)PU L#241 (P#248)L2 L#121 (2048KB) + L1d L#121 (48KB) + L1i L#121 (32KB) + Core L#121PU L#242 (P#121)PU L#243 (P#249)L2 L#122 (2048KB) + L1d L#122 (48KB) + L1i L#122 (32KB) + Core L#122PU L#244 (P#122)PU L#245 (P#250)L2 L#123 (2048KB) + L1d L#123 (48KB) + L1i L#123 (32KB) + Core L#123PU L#246 (P#123)PU L#247 (P#251)L2 L#124 (2048KB) + L1d L#124 (48KB) + L1i L#124 (32KB) + Core L#124PU L#248 (P#124)PU L#249 (P#252)L2 L#125 (2048KB) + L1d L#125 (48KB) + L1i L#125 (32KB) + Core L#125PU L#250 (P#125)PU L#251 (P#253)L2 L#126 (2048KB) + L1d L#126 (48KB) + L1i L#126 (32KB) + Core L#126PU L#252 (P#126)PU L#253 (P#254)L2 L#127 (2048KB) + L1d L#127 (48KB) + L1i L#127 (32KB) + Core L#127PU L#254 (P#127)PU L#255 (P#255)HostBridgePCIBridgePCI 98:00.0 (RAID)Block(Disk) "sdb"Block(Disk) "sda"HostBridgePCIBridgePCI a8:00.0 (Ethernet)Net "ens4f0np0"OpenFabrics "rocep168s0f0"PCI a8:00.1 (Ethernet)Net "ens4f1np1"OpenFabrics "rocep168s0f1"HostBridgePCIBridgePCI b8:00.0 (NVMExp)Block(Disk) "nvme14n1"PCIBridgePCI b9:00.0 (NVMExp)Block(Disk) "nvme2n1"PCIBridgePCI ba:00.0 (NVMExp)Block(Disk) "nvme13n1"PCIBridgePCI bb:00.0 (NVMExp)Block(Disk) "nvme1n1"HostBridgePCIBridgePCI c8:00.0 (NVMExp)Block(Disk) "nvme3n1"PCIBridgePCI c9:00.0 (NVMExp)Block(Disk) "nvme0n1"PCIBridgePCI ca:00.0 (NVMExp)Block(Disk) "nvme18n1"PCIBridgePCI cb:00.0 (NVMExp)Block(Disk) "nvme8n1"HostBridgePCIBridgePCI d8:00.0 (NVMExp)Block(Disk) "nvme22n1"PCIBridgePCI d9:00.0 (NVMExp)Block(Disk) "nvme15n1"PCIBridgePCI da:00.0 (NVMExp)Block(Disk) "nvme10n1"PCIBridgePCI db:00.0 (NVMExp)Block(Disk) "nvme12n1"HostBridgePCI ed:00.0 (Co-Processor)HostBridgePCI ef:00.0 (Co-Processor)Misc(MemoryModule)Misc(MemoryModule)Misc(MemoryModule)Misc(MemoryModule)Misc(MemoryModule)Misc(MemoryModule)Misc(MemoryModule)Misc(MemoryModule)Misc(MemoryModule)Misc(MemoryModule)Misc(MemoryModule)Misc(MemoryModule)Misc(MemoryModule)Misc(MemoryModule)Misc(MemoryModule)Misc(MemoryModule)Misc(MemoryModule)Misc(MemoryModule)Misc(MemoryModule)Misc(MemoryModule)Misc(MemoryModule)Misc(MemoryModule)Misc(MemoryModule)Misc(MemoryModule)Misc(MemoryModule)Misc(MemoryModule)Misc(MemoryModule)Misc(MemoryModule)Misc(MemoryModule)Misc(MemoryModule)Misc(MemoryModule)Misc(MemoryModule)
参考文档
hwloc-2.10 官网指导文档
